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Audio synthesizer in FPGA chip
Tomko, Jakub ; Pristach, Marián (referee) ; Bohrn, Marek (advisor)
This thesis analyses methods of sound synthesis. Advantages and disadvantages of application of individual methods in music synthetizers are evaluated. Based on piano sound analysis, the suitable method for synthesizer's design is chosen. Synthesizer has been implemented in FPGA of Spartan-3 Development Board.
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Disk Drive Based on FLASH Memory
Dvořák, Miroslav ; Strnadel, Josef (referee) ; Šimek, Václav (advisor)
The work deals with flash technology, the history of its development, current application of this technology and discusses the advantages and disadvantages of flash memories. It describes the integration of flash technology into mass storage devices and commonly used mechanisms that suppress the flash shortcomings for such application. The next part of the work focuses on analysis of commonly used buses for flash storage devices. Based on these theoretical foundations, text presents way to develop own flash based disk. The work focuses mainly on finding the most accessible platform for connecting the disk to personal computers - USB, on PCB design for storage module in Eagle CAD and implementation of necessary firmware for MCU and VHDL design for FPGA, that provide the disk functionality. At the end the work summarizes the results and outlines the way of further development.
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Analog Signals Datalogger
Ščišľak, Tomáš ; Frýza, Tomáš (referee) ; Vyskočil, Pavel (advisor)
The subject of my bachelor’s thesis is construction of device, which provides measuring and digitally recording of analog signals. The first part of this thesis deals with an analysis of circuit properties and building the basic scheme. It was important to choose proper components available. Datalogger consists of integrated digital circuits, which provide fast and reliable communication path. Function of main unit performs microcontroller Atmega128. The realization of external modules for current sensing looks interresting, particularly implementation of Hall sensor ACS755, circuits HCPL and solution of their connection with the main board. Second part of this thesis is oriented on hardware and software realization.
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The PXA270M ARM module and its usage as private branch exchange
Vojtíšek, Jindřich ; Šilhavý, Pavel (referee) ; Daněček, Vít (advisor)
This work deals with using the operating system Linux on diskless devices. This is solved on the development kit Voipac PXA270M, which is based on the ARM processor. This work deals further with the distributions of the Linux operating system, which are suitable to use for the device based on the ARM processor. The Linux was chosen because it is one of the most flexible operating systems and the Linux is kept as open source software code, except to the distribution of the Red hat and a few special distributions. The NFS protocol and TFTP are described there. The TFTP and NFS are used to deploy the operating system. It describes there, what are the TFTP and NFS and the principle of their use in computer networks. Practical part is as to, what is needed for the functioning of the TFTP and NFS server on the Ubuntu 11.10 plus how configure them. The OpenOCD is another part of this work. The OpenOCD is designed to work in the device memory. There is shown how to install and run the OpenOCD in order to communicate with the development kit Voipac PXA270M. This work shows how to configure the bootloader U-boot for booting the operating system from the network using the NFS and TFTP. There is described how compile and install PBX Asterisk on Voipac PXA270M with use of cross compiler and how cross compile zlib, OpenSSL and ncurses needed to install nad run Asterisk.
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Versatile Programmer of Components with JTAG Interface
Bartek, Lukáš ; Kaštil, Jan (referee) ; Šimek, Václav (advisor)
This master's thesis deals with designing and implementation of universal programmer with JTAG interface. The project consists of a hardware and software part. Theoretical part discusses actual state in using the standards for programming and testing electronic devices, with special emphasis on JTAG implementation. Next part deals with programming ARM and FPGA devices through JTAG. The programming of this devices using available software is described in the practical part of this document. Final product of this work is the programmer itself. The programmer consists of the hardware and supplement software. At the end of this thesis there is a conclusion about possible improvements and development in the future.
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Generic BIOS Update Mechanism for Linux
Mariščák, Igor ; Šimek, Václav (referee) ; Kašpárek, Tomáš (advisor)
This work provides overview of creating of a simple driver for the BIOS flash memory by accessing the physical computer memory. Although, the BIOS is one of a system's core components, there is no standardized update mechanism approach. Purpose of thesis is to create module driver by taking advantage of existing interface subsystem MTD, to suggest and implement driver for one specific device to Linux kernel operating system. Also explains technique allowing write access to registers of the flash memory with utilization of configuration file.
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Tool for Management of Flash Memory Wear-Leveling on Embedded System Device
Havlík, Martin ; Strnadel, Josef (referee) ; Šimek, Václav (advisor)
Práce se zabývá mechanismem wear leveling nad pamětí typu flash, zejména implementací poskytovanou společností Espressif v rámci IoT Development Framework, a to s cílem vytvořit nástroj pro sledování opotřebení flash paměti způsobené operacemi mazání. Pro účely tohoto nástroje je vytvořena vylepšená verze mechanismu, řešící některé nedostatky a rozšiřující původní wear leveling poskytovaný společností Espressif. Vylepšení zahrnuje možnost sledovat opotřebení paměti s rozlišením jednotlivých sektorů a zavádí pseudonáhodnou složku do mapovacího algoritmu za pomocí šifry zachovávající formát založené na nevyvážené Feistelově síti, vedoucí k rovnoměrnějšímu rozložení operací mazání po paměti. Toto pseudonáhodné mapování je následně otestováno pomocí simulace životnosti paměti ve vybraných zátěžových scénářích, s výsledky vykazujícími až pár procentní vylepšení v rovnoměrnosti opotřebení oproti původnímu algoritmu. Závěrem je vytvořen nástroj pro sledování opotřebení flash paměti, sestávající z vestavěné back-end části a PC front-end GUI vizualizační části.
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Final report of the project - Secure erasing memory chips using electromagnetic pulse
Fitl, Přemysl ; Vrňata, M. ; Fišer, L. ; Novotný, Michal ; Scholtz, V. ; Vlček, J. ; Tomeček, D.
The subject of this contractual research was the theoretical analysis and the mathematical model of the problem of electromagnetic pulse penetration and involvement of storage function of the memory chips. The report includes description of the experimental preparation memory chip, methodology of memory media testing, experiment shielding, software scanning of the memory chip, EMP generation, EMP intensity measurement. \nSummary of results of experiments of EMP influence on the memory media.\nA comprehensive research report was handed over to NUKIB representatives on 31 May 2018. NUKIB representatives confirmed receipt of the report. \nDefense of the project results took place on 27.6.2018 in the NUKIB building. Project goals were fulfilled. The agreed amount was invoiced for this report.\n\n
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Secure erasing memory chips using electromagnetic pulse - phase 1
Fitl, Přemysl ; Vrňata, M. ; Fišer, L. ; Novotný, Michal ; Scholtz, V. ; Vlček, J. ; Tomeček, D.
The subject of this contractual research was to perform study of technologies and principles of flash memories currently available on the market. The research report focuses on technological advancements in their development, the readability of stored / deleted data by available laboratory techniques, and the interaction of these memories with the electromagnetic pulse.\nThe outcome was handed over to NUKIB representatives on 29 March 2018. \nThe project was fulfilled, the agreed amount was invoiced for this report.\n\n\n
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